In my role as Arm’s automotive lead, my team and I are constantly talking with both car makers and our automotive ecosystem (the top 15 automotive chip makers license Arm IP) discussing progress toward fully-autonomous driving. We of course talk about how we can address their performance, power and security requirements, but most of the discussions often focus on safety.
Safety is the highest priority for car makers we talk with, for both the obvious technology factors associated with autonomous systems controlling all aspects of driving, but also to ensure that human passengers can trust their automated driver. If consumers don’t trust the autonomous systems in their cars are safe, then mass market acceptance of this technology will be slow to happen.
Ironically, it’s a human factor, driver error, autonomous driving is expected to eliminate. Considering 94 percent of all accidents are a result of driver error, fully-autonomous driving is expected to significantly reduce the number of accidents and fatalities. It is why safety cannot be an afterthought and take a backseat to performance, power-efficiency and security when developing autonomous-class SoCs and systems. Unfortunately, the path to level 5 autonomy has been paved with prototypes, often based on power-hungry, expensive data center CPUs lacking even the most basic functional safety features.
Arm has prioritized safety for years now and it is a key reason why Arm IP is in 65 percent of the silicon used in ADAS applications. Our automotive ecosystem has access to the industry’s broadest array of functional safety IP with the latest ISO certifications. To further ensure our silicon partners get a head start on safety, today we’re announcing the Arm Safety Ready program which centralizes Arm’s massive investment in safety, enabling our silicon partners and the entire automotive supply chain to accelerate their timelines for bringing safer products to market faster.
But our safety leadership doesn’t stop with integrating the latest certifications and standards. Today, we’re also announcing availability of the first autonomous-class processor with integrated safety, the new Arm Cortex-A76AE, which has been uniquely designed for automotive and includes Split-Lock technology, a game-changing safety innovation available for the first time in application processors.
Getting ‘Safety Ready’ for the next levels of autonomy
The Safety Ready program encompasses Arm’s existing safe and new or future products which have been through a rigorous functional safety process, including systematic flows and development in support of ISO 26262 and IEC 61508 standards. Safety Ready is a one-stop shop for software, tools, components, certifications and standards which will simplify and reduce the cost of integrating functional safety for Arm partners. By taking advantage of the program offerings, partners and car makers can be confident their SoCs and systems incorporate the highest levels of functional safety required for autonomous applications.
Cortex-A76AE: The world’s first autonomous-class processor with integrated safety
The Cortex-A76AE is a game-changing new CPU uniquely designed for automotive and optimized for 7nm process nodes. AE stands for “Automotive Enhanced” and any Arm IP with the AE designator will include specific features addressing the requirements of in-vehicle processing.
A high level of processing capability is required for autonomous driving, with inherent safety as standard. Cortex-A76AE delivers both without compromise as the industry’s first high-performance application processor with Split-Lock capability, combining the processing performance required for autonomous applications and high-integrity safety. While Split-Lock is not new to the industry, Arm is the first to introduce it to a processor uniquely designed for high performance automotive applications such as autonomous drive. Split-Lock delivers:
Flexibility not available in previous lock-step CPU implementations
CPU clusters in an a SoC can be configured either in ‘split mode’ for high performance, where two (or four) independent CPUs in the cluster that can be used for diverse tasks and applications
Or ‘lock mode’ where CPUs are in lock-step, creating one (or two) pairs of locked CPUs in a cluster, for higher safety integrity applications
The CPU clusters can be configured to operate in a mix of either mode, post Silicon production
Car makers can also design their autonomous systems to require watts and not the kilowatts required for today prototypes thanks to Arm’s leadership in power-efficient computing in Cortex-A76AE. Lower-power also enables a more energy-efficient use of vehicle battery power combined with thermal efficiency to aid the packaging of compute capability while extending the range of vehicles for a lower total cost of driving.
As always, Arm takes the entire system into consideration and to complement Cortex-A76AE, Arm is introducing new Automotive Enhanced system IP for designing a comprehensive autonomous-class SoC. The new CoreLink GIC-600AE, CoreLink MMU-600AE and CoreLink CMN-600AE provide critical elements such as high-performance interrupt management, extended virtualization and memory management, and connectivity to multiple CPU clusters to scale performance in safe multicore systems. These products have been designed to enable high-performance systems, targeting ASIL-B to ASIL-D safety integrity, and support the Split-Lock and systematic capabilities for functional safety designed into the Cortex-A76AE.
Scalability only the Arm automotive ecosystem can deliver
Development costs are increasing exponentially as the software complexity and volume for autonomous systems is rising dramatically. To put this in perspective, it’s predicted that a Level 5 vehicle will require a billion lines of code, whereas a Boeing 787 Dreamliner requires 14 million lines of code. Arm and its robust automotive developer ecosystem are simplifying and reducing costs across all layers of automotive software stacks and the tools on a common architecture.
Arm’s Automotive IP roadmap
The Cortex-A76AE is the first in a roadmap of “Automotive Enhanced” processors which will deliver the fullest functional safety capable IP portfolio in the industry. The new roadmap includes “Helios-AE” and “Hercules-AE”, all optimized for 7nm. More details to come as these products are launched. For more on the safety-first guiding principle driving our AE roadmap, visit this blog from Arm’s President of our Intellectual Property Group, Rene Haas.
Arm has been designing chips for automotive applications since 1996 and only Arm can address the compute needs of the entire vehicle from bumper to bumper. It’s why the top 15 automotive chip makers are Arm licensees, and why Arm-based silicon powers more than 65 percent of today’s ADAS applications as well as 85 percent of IVI applications. By delivering safe, autonomous-class compute solutions to the industry, Arm and its ecosystem are ensuring safety is not an afterthought and helping car makers earn the consumer trust required for the mass deployment of safe and fully-autonomous vehicles.